The disclosure relates to a semiconductor structure and a method of manufacturing a semiconductor structure.
Modern integrated circuits (IC) are comprised of millions of active devices, such as transistors and capacitors. These devices are initially isolated from each other but are later interconnected together to form functional circuits. Typical interconnect structures include lateral interconnections, such as metal lines (wirings), and vertical interconnections, such as though holes, vias, and contacts. Interconnections are increasingly determining the limits of performance and the density of modern integrated circuits. Electrical connections are made through bond pads on a die to a package substrate. The bond pads can be used for wire bonding or flip-chip bonding. Flip-chip packaging utilizes bumps to establish electrical connections between input/output (I/O) pads of a die and a substrate. Further, a bump is disposed on a surface of the substrate to become a semiconductor package. The bump is then heat treated to maintain its position on the substrate.
In addition to flip-chip packaging, wafer level chip scale packaging (WLCSP) is widely used for its low cost and relatively simple manufacturing operations. During the WLCSP operation, a number of semiconductor components are assembled on a semiconductor wafer. However, due to the miniaturized scale of most semiconductor packages, the semiconductor components are becoming increasingly smaller and denser on the semiconductor wafer. Furthermore, numerous manufacturing operations are implemented within such a small semiconductor wafer. Thus, manufacturing of the electrical interconnections between semiconductor components becomes more complicated and may result in the complexity of the manufacturing to cause an increase in yield loss, such as poor reliability of the semiconductor package. Such circumstances have created more challenges for modifying the structure of semiconductor packages and improving the manufacturing operations. As such, there is a continuous need to improve the method for manufacturing semiconductor packages and solving the above deficiencies.